Read this:
http://www.spansion.com/Support/Datashee...56S_00.pdf
particularly:
Extended Address
The S25FL128S and S25FL256S devices support 32-bit addresses to enable higher density devices than
allowed by previous generation (legacy) SPI devices that supported only 24-bit addresses. A 24-bit byte
resolution address can access only 16 Mbytes (128 Mbits) of maximum density. A 32-bit byte resolution
address allows direct addressing of up to a 4 Gbytes (32 Gbits) of address space.
Legacy commands continue to support 24-bit addresses for backward software compatibility. Extended 32-bit
addresses are enabled in three ways:
Bank address register — a software (command) loadable internal register that supplies the high order bits
of address when legacy 24-bit addresses are in use.
Extended address mode — a bank address register bit that changes all legacy commands to expect 32 bits
of address supplied from the host system.
New commands — that perform both legacy and new functions, which expect 32-bit address.
The default condition at power-up and after reset, is the Bank address register loaded with zeros and the
extended address mode set for 24-bit addresses. This enables legacy software compatible access to the first
128 Mbits of a device.
The S25FL128S device supports the extended address features in the same way but in essence ignores bits
31 to 24 of any address because the main flash array only needs 24 bits of address. This enables simple
migration from the 128-Mb density to higher density devices without changing the address handling aspects
of software.
All they are doing is showing the flash chips banks as two separate flash chips so it is compatible with existing software. so when you reason that if finds 2 x 16mb flash chips, it will have 32mb total, its using a S25FL256 in compatibility mode. not a phantom image.
http://www.spansion.com/Support/Datashee...56S_00.pdf
particularly:
Extended Address
The S25FL128S and S25FL256S devices support 32-bit addresses to enable higher density devices than
allowed by previous generation (legacy) SPI devices that supported only 24-bit addresses. A 24-bit byte
resolution address can access only 16 Mbytes (128 Mbits) of maximum density. A 32-bit byte resolution
address allows direct addressing of up to a 4 Gbytes (32 Gbits) of address space.
Legacy commands continue to support 24-bit addresses for backward software compatibility. Extended 32-bit
addresses are enabled in three ways:
Bank address register — a software (command) loadable internal register that supplies the high order bits
of address when legacy 24-bit addresses are in use.
Extended address mode — a bank address register bit that changes all legacy commands to expect 32 bits
of address supplied from the host system.
New commands — that perform both legacy and new functions, which expect 32-bit address.
The default condition at power-up and after reset, is the Bank address register loaded with zeros and the
extended address mode set for 24-bit addresses. This enables legacy software compatible access to the first
128 Mbits of a device.
The S25FL128S device supports the extended address features in the same way but in essence ignores bits
31 to 24 of any address because the main flash array only needs 24 bits of address. This enables simple
migration from the 128-Mb density to higher density devices without changing the address handling aspects
of software.
All they are doing is showing the flash chips banks as two separate flash chips so it is compatible with existing software. so when you reason that if finds 2 x 16mb flash chips, it will have 32mb total, its using a S25FL256 in compatibility mode. not a phantom image.